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The linear and negative feedback circuits in National Semiconductor's AN-31 and on the other page are relatively common.
But also useful are open circuit op-amps and positive feedback which is analyzed in a slightly different way.

Consider the circuit below, part of a larger schematic for an embedded system.
This circuit uses an open loop op-amp to control a selector switch.
The selector switch, a FET in this example, connects the USB power to the internal 5 Volt rail when necessary. Positive Feedback Amplifier

So, How does this work and how do you analyze it?
First, the op-amp IC1B is set up in the classic unity gain buffer, so that is analyzed.
Second, IC1A is open loop thus the equation VOUTPUT = AV*(Vp -Vm) applies. where:

Vp is the voltage at the positive or non inverting input (Pin 3)
Vm is the voltage at the minus or inverting input (Pin2), VCC3V0
AV is the voltage gain of the op-amp

Third, notice that the positive input is the output of a Voltage Divider. Since the divider resistors are equal, the division is by 2.

Okay, what do I have so far?

The equation for VOUTPUT is AV * (Vp – Vm)
- Vp is half of VIN
- Vm is 3.30V
The upper rail of the op-amp is 5V

At what input value does VOUTPUT reach the upper rail?
If VOUTPUT is 5V {the upper rail}, (Vp-Vm) = VOUTPUT/AV thus:

for a minimum AV of 15,000 (from the LM358 data sheet) VOUTPUT/AV = 5.0/15,000 = 0.3333mV
- (NOTE: at typical gain or maximum gain this value will be lower.)
to get a difference of 0.3333mV, VIN must be 6.60066666V
If VIN = 6.6 and VCC3V0 is 3.3 the (Vp - Vm) is zero.

Thus, so long as VIN is greater than 6.60066666V then VOUTPUT is at the upper rail.
From a VIN of 6.60066666V to 6.6000000V, the VOUTPUT is linearly related to VIN.
For a VIN of 6.6000000V and below, the VOUTPUT is zero

Why is this important?
To answer this we need to look at the FET.
The FET is an FQPF7P06, it is a enhancement mode, P-Channel device. Normally OFF.

The gate is connected to the output of IC1B,
The source is connected to +5V,
The drain is connected to USBVCC, the power voltage from the USB cable.

The Vgs (gate source) Threshold voltage is between -2 and -4 volts, so the gate has to be 2.0 to 4.0 Volts below +5V to turn ON the FET.
What is not shown in this schematic is that +5V is generated from VIN with a 7805 regulator.
This regulator typically requires an input of 2.0 Volts above the output, or 7.0V, to regulate.
Finally, if the input voltage VIN is less than 6.6 V the VOUTPUT is 0.0 V.

This puts a voltage on the gate of 0V,
thus the Vgs is -5V
which turns the FET on connecting the USB power VCCUSB to the +5V.

Thus if the input voltage is too low the circuit will automatically switch to run of the USB power.

Now, in a case for absolute simplicity the unity gain buffer is not necessary. Potentially it could be deleted.
But
This op-amp is a two per package device.
Any unused op-amps must to have the input pins connected to ground to prevent noisy oscillations from starting.
It is just as easy to connect this amplifier up as a unity gain amplifier as to connect both input pins to ground.

What about the resistive divider?
Positive Feedback Amplifier

For a complete explanation of the E96 Series see this site.
The original divider is a 10k Ohm and a 10k Ohm resistor.
The analysis above shows that the value one of the resistors would be better at 11k or 11.3k.
What are the reasons for or against changing to the 11.3k resistor?
For:

Based on reels of parts, a single resistor is less than a penny
This means that the USB kicks in as soon as the regulator goes out of regulation
- There is no 'droop' in the supply voltage between 7V and 6.6V.

Against:

The 11.3k Ohm is an additional part, if not used elsewhere in the design it adds cost to:
- the overhead of the Bill of Material - the part must be ordered, received, stocked
- is an additional charge in the automated assembly for an additional reel of parts
In the testing, adds an additional odd value to the measurement instead of simply saying "half of the input voltage"

Most of the arguments against using the 11.3k value could be eliminated if
there are other values already used in the design that could be used to make up the 1.3k difference.
For example in the original design 1.00k Ohm resistors are also used,
so a 1.00k Ohm could be added in series with the upper 10.0k Ohm without too much trouble.

Provided that ...

there is board space,
and the parasitic capacitance (5-10pF) is not a problem. (In this case it isn't.)

A full tolerance study still needs to be completed before this goes to lay out,
but that is left as an exercise for the student.

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©Copyright 2006 - 2011 Circuitsville Engineering, revised 09 April 2011

©Copyright 2006 - 2011 Circuitsville Engineering,
revised 09 April 2011